3-17-2026:  Ai Linear is pleased to announce that Professor Kristofer S. J. Pister has joined the company as a Technical and Strategic Advisor. Professor Pister is a distinguished Professor of Electrical Engineering and Computer Sciences at the University of California, Berkeley, with over 30 years of experience in MEMS, wireless sensor networks, and ultra-low-power systems. He is widely recognized as a pioneer of “Smart Dust” and a leader in distributed sensing and IoT technologies. He founded Dust Networks (acquired by Linear Technology, now part of Analog Devices) and has held academic and industry roles including Assistant Professor at UCLA and leadership positions in multiple technology ventures. Professor Pister has contributed to national defense and advanced technology initiatives through the JASON Defense Advisory Group, DARPA ISAT, and Defense Science Study Groups. His work spans MEMS, micro-robotics, integrated circuits, and low-power systems, including the development of foundational tools such as the SUGAR MEMS simulator. He holds a PhD in EECS from UC Berkeley and a BA in Physics from UC San Diego, and has authored over 70 technical publications and holds more than 24 patents. At Ai Linear, he will provide guidance on ultra-low-power sensing architectures and distributed AI systems, supporting the advancement of the iAcoustic™ platform toward scalable, near-sensor intelligence.

9-1-2025:  Ai Linear is pleased to announce that Brian Gardner has joined the company as a Business Development & Customer Acquisition Advisor. Brian brings over four decades of experience in sales, marketing, and business development across the semiconductor and IP ecosystem, with leadership roles at True Circuits, Canaan, Cadence, Denali Software, QLogic, and Austin Interface (acquired by Apple). He spent 15 years at Motorola as Vice President and General Manager, where he led mixed-signal ASIC businesses with embedded processing, contributing to platforms that later became part of Freescale and subsequently NXP Semiconductors. Throughout his career, Brian has driven commercialization of mixed-signal IP, ASICs, SoCs, and networking semiconductor solutions, with a strong focus on customer acquisition and revenue growth. At Ai Linear, he will support strategic customer engagement and market expansion, helping position the iAcoustic™ platform within the emerging edge AI and predictive maintenance markets. “Brian’s deep experience in semiconductor business development and his proven track record in building customer-driven growth make him an invaluable addition to our advisory team,” said Ali Far, Founder and CEO of Ai Linear. Brian holds a BSEE from Louisiana State University.

9-1-2025:  Ai Linear Welcomes Daniel W. Loyer as Financial Compliance & Audit Advisor:  Ai Linear is pleased to announce that Daniel W. Loyer joined the company as a Financial Compliance & Audit Advisor on September 1, 2025.  Dan brings nearly five decades of experience spanning sales, marketing, and financial management in the aerospace, semiconductor, and medical technology sectors. His career includes leadership roles at organizations such as Intech, Teledyne Semiconductor, MedSensors, and Cermetek Microelectronics, where he served as Chief Financial Officer. He also founded MVM Technologies, advancing universal inkjet innovation. Throughout his career, Dan has contributed to the commercialization and scaling of technologies across defense, medical electronics, and infrastructure-related applications. His expertise in financial oversight, compliance, and operational strategy will support Ai Linear as it advances toward commercialization of its ultra-low-power, near-sensor AI solutions. “Dan’s extensive experience across both technical markets and financial leadership makes him a valuable addition to our team,” said Ali Far, Founder and CEO of Ai Linear. “His guidance will be instrumental as we scale operations and navigate the financial and compliance requirements associated with growth and commercialization.” Dan holds a BSEE from Case Institute of Technology and an MBA in Finance from Santa Clara University. He also served as a Captain in the United States Marine Corps, with responsibilities in electronic countermeasures and legal investigations.

7-15-2025: Ai Linear Awarded NSF SBIR Phase II Grant to Advance Ultra-Low-Power AI for Predictive Maintenance:  Ai Linear is pleased to announce that it has been awarded a Small Business Innovation Research (SBIR) Phase II grant from the U.S. National Science Foundation (NSF) for its project: “SBIR Phase II: Preventative Maintenance AI Chip: Software-Configurable, Tiny, Low-Latency, Always-On, Ultra-Low-Power, Near-Sensor-AI, No Cloud Required.” This award follows the successful completion of Phase I, where Ai Linear demonstrated the feasibility of its ultra-low-power smart amplifier technology for AI near sensors. The Phase II program will support the continued development, integration, and validation of the iAcoustic™ platform toward real-world deployment and commercialization. The iAcoustic™ chip enables continuous, real-time monitoring of physical systems using sound and vibration, performing intelligent analysis directly at the sensor. By eliminating the need for cloud connectivity and significantly reducing power consumption, the technology enables a new class of always-on, distributed AI systems for predictive maintenance across industrial, robotics, and infrastructure applications.  “Phase II support from NSF allows us to accelerate our vision of bringing intelligence directly to the sensor,” said Ali Far, Founder and CEO of Ai Linear. “Our goal is to enable ultra-low-power, low-latency AI that operates independently of the cloud, unlocking scalable and cost-effective monitoring solutions for a wide range of critical assets.”  The successful commercialization of this technology is expected to enhance the reliability and efficiency of systems ranging from motors and drones to industrial equipment and smart infrastructure, while contributing to reduced maintenance costs and improved operational safety.

09-01-2024 Ai Linear has completed and submitted the final report for the NSF grant

03-28-2023  Issued Patent:  US11,615,256; B1 ; Title: Hybrid accumulation method in multiply-accumulate for machine learning

03-23-2023  Issued Patent:  US11,610,104; B1 ; Title: Asynchronous analog accelerator for fully connected artificial neural networks

10-11-2022 Issued Patent: US 11,457,805; B1; Title: Digital approximate multipliers for machine learning and artificial intelligence applications

09-15-2022   Ai Linear, led by Ali Tasdighi Far, has been awarded a National Science Foundation (NSF) grant to develop a Low Noise Amplifier Running Fast at Ultra-low Currents. This IC is an ultra-low-power “smart amplifier” designed for AI applications near sensors. This technology aims to bring advanced, efficient AI processing directly to sensor-based systems, enhancing real-time data analysis at the edge while minimizing power consumption.  

08-16-2022 Issued Patent: US 11,416,218 B1; Title: Digital approximate squarer for machine learning

3/15/2022 Issued Patent: US 11,275,909 B1; Title: Current-mode analog multiply-accumulate circuits for artificial intelligence

10/12/2021 Issued Patent: US 11,144,316 B1; Title: Current-mode mixed-signal SRAM based compute-in-memory for low power machine learning

05/25/2021 Issued Patent: US 11,016,732 B1; Title: Approximate nonlinear digital data conversion for small size multiply-accumulate in artificial intelligence

02/09/2021 Issued Patent US 10,915,298 B1; Title: Current mode multiply-accumulate for compute in memory binarized neural networks

01/05/2021 Issued patent US 10,884,705 B1; Title: Approximate mixed-mode square-accumulate for small area machine learning

12/08/2020 Issued Patent US 10,862,501 B1; Title: Compact high-speed multi-channel current-mode data-converters for artificial intelligence

12/08/2020 Issued Patent US 10,862,495 B1; Title: Glitch free current mode analog to digital converters for artificial intelligence

11/24/2020 Issued Patent US 10,848,167 B1; Title: Floating current-mode digital-to-analog-converters for small multipliers in artificial intelligence

11/10/2020 Issued Patent US 10,832,014 B1; Title: Multi-quadrant analog current-mode multipliers for artificial intelligence

11/10/2020 Issued Patent US 10,833,692 B1; Title: Small low glitch current mode analog to digital converters for artificial intelligence

11/03/2020 Issued Patent US 10,826,525 B1; Title: Nonlinear data conversion for multi-quadrant multiplication in artificial intelligence

10/27/2020 Issued Patent US 10,819,283 B1; Title: Current-mode analog multipliers using substrate bipolar transistors in CMOS for artificial intelligence

10/13/2020 Issued Patent US 10,804,921 B1; Title: Current mode analog to digital converter with enhanced accuracy

10/13/2020 Issued Patent US 10,804,925 B1; Title: Tiny factorized data-converters for artificial intelligence signal processing

10/06/2020 Issued Patent US 10,797,718 B1; Title: Tiny low power current mode analog to digital converters for artificial intelligence

09/09/2020 Issued Patent US 10,789,046 B1; Title: Low-power fast current-mode meshed multiplication for multiply-accumulate in artificial intelligence

06/30/2020 Issued Patent US 10,700,695 B1; Title: Mixed-mode quarter square multipliers for machine learning

03/17/2020 Issued Patent US 10,594,334 B1; Title: Mixed-mode multipliers for artificial intelligence

02/11/2020 Issued Patent US 10,560,058 B1; Title: Method of equalizing currents in transistors and floating current source

01/14/2020 Issued Patent US 10,536,117 B1; Title: Low voltage rail to rail high speed analog buffer and method thereof

11/26/2019 Issued Patent US 10,491,167 B1; Title: Low noise amplifier running fast at ultra low currents

09/10/2019 Issued Patent US 10,411,597 B1; Title: Ultra-low power and ultra-low voltage bandgap voltage regulator device and method thereof

02/05/2019 Issued Patent US 10,198,022 B1; Title: Ultra-low power bias current generation and utilization in current and voltage source and regulator devices

01/08/2019 Issued Patent US 10,177,713 B1; Title: Ultra-low power high-performance amplifier

03/02/2018 Issued Patent US 9,921,600 B1; Title: Ultra-low power bias current generation and utilization in current and voltage source and regulator devices

2018: IEEE LASCAS accepts and invites Ali Tasdighi Far to present his paper titled “Sub-1 volt class AB amplifier with low noise, ultra low power, high-speed, using winner-take-all” at the 2018 Conference

2018: IEEE LASCAS accepts and invites Ali Tasdighi Far to present his paper titled “Class AB amplifier with noise reduction, speed boost, gain enhancement, and ultra low power,” at the 2018 Conference

10/03/2017 Issued Patent US 9,780,652 B1; Title: Ultra-low power and ultra-low voltage bandgap voltage regulator device and method thereof

2017: Best Paper Award for “Low noise rail-to-rail amplifier runs fast at ultra low currents and targets energy harvesting,” selected by IEEE ROPEC conference

2017: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Low noise rail-to-rail amplifier runs fast at ultra low currents and targets energy harvesting,” at the 2017 conference

2017: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Enhanced gain, low voltage, rail-to-rail buffer amplifier suitable for energy harvesting,” at the 2017 conference

2017: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Compact ultra low power class AB buffer amplifier,” at the 2017 conference

12/13/2016 Issued Patent US 9,519,304 B1; Title: Ultra-low power bias current generation and utilization in current and voltage source and regulator devices

2016: EEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Small size class AB amplifier for energy harvesting with ultra low power, high gain, and high CMRR,” at the 2016 Conference

2016: IEEE CCECE accepts and invites Ali Tasdighi Far to present his paper titled “A 220nA bandgap reference with 80dB PSRR targeting energy harvesting,” at the 2016 conference

2016: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Amplifier for energy harvesting: Low voltage, ultra low current, rail-to-rail input-output, high speed,” at the 2016 Conference

2015: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Subthreshold current reference suitable for energy harvesting: 20ppm/C and 0.1%/V at 140nW,” at the 2015 Conference

2015: IEEE ICCE-Berlin accepts and invites Ali Tasdighi Far to present his paper titled “Subthreshold bandgap voltage reference aiming for energy harvesting: 100na, 5 ppm/c, 40 ppm/v, psrr -88db,” at the 2015 conference

2014: IEEE CONECCT accepts and invites Ali Tasdighi Far to present his paper titled “A low supply voltage 2µW half bandgap reference in standard sub-µ CMOS,” at the 2014 Conference

2014: IEEE ROPEC accepts and invites Ali Tasdighi Far to present his paper titled “Current reference for energy harvesting: 50um per side, At 70 nW, regulating to 125C,” at the 2014 Conference

2013: IEEE GHTCE accepts and invites Ali Tasdighi Far to present his paper titled “A 5µW fractional CMOS bandgap voltage and current reference,” at the 2013 Conference

2013: IEEE ICEESE accepts and invites Ali Tasdighi Far to present his paper titled “A 400nW CMOS bandgap voltage reference,” at the 2013 conference